Electrical Engineering Department Training Course titled: RTL Design using Verilog HDL

 

Electrical Engineering Department Training Course titled: RTL Design using Verilog HDL

Date: 02, 04-05/03/2020

Time: 3:00pm – 5:00pm 

Venue: Electrical Engineering Lab (L2205), Workshops Building

Delivered by:  Dr. Neeraj Kumar

                         Eng. Mohammed Abdul Muqeet

- Students should bring their own Laptops.

- Only the first 20 students will be invited to the training.

- Training Course is for the Electrical Engineering Students of Level 6 and above.

Registration Link: https://forms.gle/3wJ3vediVN5W6RRm9